Semiconductor component and corresponding fabrication method

ABSTRACT

A semiconductor component a substrate and a dielectric layer provided on the substrate, the dielectric layer being a binary metal oxide of a rare earth metal or of a transition metal.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a semiconductor component having, in, or on, a substrate and a dielectric layer provided on the substrate. The invention likewise relates to a corresponding fabrication method.

[0002] The term substrate is intended to be understood in the general sense and can therefore encompass both single-layer and multilayer substrates.

[0003] Although applicable to any desired semiconductor components, the present invention and the problem area on which it is based will be explained with regard to capacitors in silicon technology.

[0004] So-called one-transistor cells are used in dynamic random access memories (DRAMs). The cells comprise a storage capacitor and a selection transistor which connects the storage electrode to the bit line. The storage capacitor can be designed as a trench capacitor or as a stacked capacitor. The invention described here relates quite generally to capacitors for such DRAMs in the form of trench capacitors and stacked capacitors.

[0005] It is known to fabricate such a capacitor, e.g. for a DRAM (dynamic random access memory), with the construction electrode layer/insulator layer/electrode layer, in which case the electrode layers may be metal layers or (poly)silicon layers.

[0006] In order to further increase the storage density for future technology generations, the feature size is reduced from generation to generation. The ever decreasing capacitor area and the resultant decreasing capacitor capacitance lead to problems. Therefore, it is important for the capacitor capacitance at least to be kept constant despite a smaller feature size. This can be achieved, inter alia, by increasing the surface charge density of the storage capacitor.

[0007] Previously, this problem has been solved on the one hand by enlarging the available capacitor area (for a predetermined feature size). This can be achieved, e.g. by depositing polysilicon with a rough surface (“HSG”) in the trench or onto the bottom electrode of the stacked capacitor. On the other hand, the surface charge density has previously been increased by reducing the thickness of the dielectric. In this case, exclusively various combinations of SiO₂ (silicon oxide) and Si₃N₄ (silicon nitride) have previously been used as dielectric for DRAM capacitors.

[0008] A few materials having a higher dielectric constant have furthermore been proposed for stacked capacitors. These explicitly include Ta₂O₅ and BST (barium strontium titanate). However, these materials are not thermostable in direct contact with silicon or polysilicon. Moreover, they are only inadequately thermostable.

SUMMARY OF THE INVENTION

[0009] An object of the present invention is to specify an improved semiconductor component and a corresponding fabrication method of the type mentioned in the introduction which yield a thermostable dielectric.

[0010] In a semiconductor component of the invention, a substrate is provided. A dielectric layer is provided on the substrate. The dielectric layer comprises a binary metal oxide.

[0011] In a method of the invention, a semiconductor component is fabricated by providing a substrate. A dielectric layer is provided on the substrate by first depositing a metal onto the substrate and then oxidizing the metal in a thermal process so that the dielectric layer comprises a binary metal oxide.

[0012] One of the exemplary embodiments of the invention is illustrated in the drawings and is explained in more detail in the description below.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] FIGS. Ia-1 c show a diagrammatic illustration of the essential method steps for fabricating a semiconductor component as one embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] For the purposes of promoting an understanding of the principles of the invention, reference will now be made to the preferred embodiment illustrated in the drawings and specific language will be used to describe the same. It will nevertheless be understood that no limitation of the scope of the invention is thereby intended, such alterations and further modifications in the illustrated device, and/or method, and such further applications of the principles of the invention as illustrated therein being contemplated as would normally occur now or in the future to one skilled in the art to which the invention relates.

[0015] A high surface charge density is produced while complying with the leakage current specifications in the DRAM capacitor by using specific materials having a high relative permittivity.

[0016] In accordance with one preferred development, the binary metal oxide is an oxide of a rare earth metal.

[0017] In accordance with a further preferred development, the oxide is selected from the following group: Ce₂O₃, Pr₂O₃, Nd₂O₃, Pm₂O₃, Sm₂O₃, Eu₂O₃, Gd₂O₃, Tb₂O₃, Dy₂O₃, Ho₂O₃, Tm₂O₃, Er₂O₃, Yb₂O₃, Lu₂0₃.

[0018] In accordance with a further preferred development, the binary metal oxide is an oxide of a transition metal.

[0019] In accordance with a further preferred development, the oxide is selected from the following group; Al₂O₃, HfO₂, ZrO₂, Sc₂O₃, Y₂O₃, La₂O₃, BeO, MgO, CaO, SrO, Li₂O.

[0020] In accordance with a further preferred development, the semiconductor component is a plate capacitor or a trench capacitor with the construction electrode layer/dielectric layer/electrode layer, the electrode layers being metal layers or (poly)silicon layers.

[0021] In accordance with a further preferred development, the semiconductor component is a trench capacitor, the dielectric being grown epitaxily in the trench.

[0022] In FIGS. 1a-1 c, identical reference symbols designate identical or functionally identical elements.

[0023] Generally, one preferred embodiment proposes materials which, in contact with silicon, can expect a good thermostability, as dielectrics for DRAM storage capacitors with SIS or alternatively MSIS, MIS and MIM structure (S=silicon, I=dielectric, M=metal).

[0024] In this case, these dielectric layers may have the following structural properties:

[0025] The following materials and their mixtures or nanolaminates are considered as thermostable dielectric:

[0026] Oxides of rare earths:

[0027] Ce₂O₃, Pr₂O₃, Nd₂O₃, Pm₂O₃, Sm₂ 0 ₃, Eu₂ 0 ₃, Gd₂O₃, Tb₂O₃, Dy₂O₃, Ho₂O₃, Er₂O₃, Tm₂O₃, Yb₂O₃, Lu₂O₃

[0028] Transition metal oxides:

[0029] Al₂O₃, HfO₂, ZrO₂, Sc₂O₃, Y₂O₃, La₂O₃, BeO, MgO, CaO, SrO, Li₂O

[0030] The deposition can be effected, in principle, by sputtering, vapor deposition, molecular beam epitaxy, CVD (chemical vapor deposition) or ALCVD (atom layer chemical vapor deposition) methods, if appropriate with plasma or remote plasma enhancement. ALCVD and CVD, in particular, are appropriate for structures with high aspect ratios. As an alternative, it is also possible first to deposit the associated metal, which is then converted into the oxide by suitable oxidation.

[0031] It is advantageous, specifically in the case of an SIS or SIM capacitor in the trench, that high-temperature processes are also possible during the deposition and/or during temperature steps that may follow. Therefore, depositions at elevated temperature are also appropriate there. In particular, layers can then be grown in a crystalline manner, in an oriented manner or even epitaxily.

[0032] In order to support epitaxial growth in the trench, it is expedient to provide trench walls of a uniform orientation. For that purpose, it is possible to use known (wet) etching methods which etch specific crystallographic directions more rapidly than others (preferred orientations). Trenches of rectangular (or square) cross section can be produced in this way. The side walls of such trenches have a uniform orientation (e.g. [110]). The latter process will now be explained in more detail with reference to FIGS. Ia-c.

[0033] With reference to FIG. Ia, first a trench 10 is formed by a known method in a silicon substrate 1, which serves as a first capacitor electrode. The method may be, for example, reactive ion etching using a corresponding oxide hard mask.

[0034] With reference to FIG. 2b, in a subsequent step, a wet etching method is employed in order to produce a widened trench 10′ with modified trench walls with a predetermined crystal orientation. The crystal orientation is [100] in the present case.

[0035] In a subsequent step, a dielectric layer 20 e.g. made of Pr₂O₃, Nd₂O₃ or other of the materials mentioned is grown in an oriented manner on the trench walls with a predetermined crystal orientation thus prepared.

[0036] In a further process step (not shown) the modified trench 10′ with the dielectric layer 20 is filled with polysilicon, which forms a second capacitor electrode. It is thus possible to produce a capacitor with a high surface charge density while complying with the leakage current specifications for the DRAM memories.

[0037] While a preferred embodiment has been illustrated and described in detail in the drawings and foregoing description, the same is to be considered as illustrative and not restrictive in character, it being understood that only the preferred embodiment has been shown and described and that all changes and modifications that come within the spirit of the invention both now or in the future are desired to be protected. 

We claim as our invention:
 1. A semiconductor component comprising: a substrate; a dielectric layer provided on the substrate; and the dielectric layer comprising a binary metal oxide.
 2. The semiconductor component according to claim 1 wherein the binary metal oxide comprises an oxide of a rare earth metal.
 3. The semiconductor component according to claim 2 wherein the oxide comprises an element selected from a following group: Ce₂O₃, Pr₂O₃, Nd₂O₃, PM₂O₃, SM₂O₃, Eu₂O₃, Gd₂O₃, Tb₂O₃, DY₂O₃, Ho₂O₃, Er₂O₃, Tm₂O₃, Yb₂O₃, Lu₂O₃.
 4. The semiconductor component according to claim 1 wherein the binary metal oxide comprises an oxide of a transition metal.
 5. The semiconductor component according to claim 4 wherein the oxide comprises an element selected from the following group: Al₂O₃, HfO₂, ZrO₂, Sc₂O₃, Y₂O₃, La₂O₃, BeO, MgO, CaO, SrO, Li₂O.
 6. The semiconductor component according to claim 1 wherein the semiconductor component comprises one of a plate capacitor and a trench capacitor with a construction comprising an electrode layer/dielectric layer/electrode layer, the electrode layers being at least one of metal layers and silicon layers.
 7. A semiconductor capacitor component, comprising: a substrate comprising a first electrode layer of the capacitor; a dielectric layer provided on the substrate; the dielectric layer comprising a binary metal oxide; and one of a metal layer and a silicon layer on the dielectric layer as a second electrode layer of the capacitor.
 8. A method for fabricating a semiconductor component, comprising the steps of: providing a substrate; and providing a dielectric layer on the substrate by first depositing a metal onto the substrate which is then oxidized in a thermal process so that the dielectric layer comprises a binary metal oxide.
 9. The method according to claim 8 wherein the binary metal oxide comprises an oxide of a rare earth metal.
 10. The method according to claim 8 wherein the binary metal oxide comprises an oxide of a transition metal.
 11. The method for fabricating a semiconductor component according to claim 8, wherein the dielectric layer is deposited by at least one of the following methods: sputtering, vapor deposition, molecular beam epitaxy, CVD (chemical vapor deposition), and ALCVD (atomic layer chemical vapor deposition).
 12. A method of claim 11 wherein the method includes plasma enhancement.
 13. The method according to claim 12, wherein the plasma enhancement comprises remote plasma enhancement.
 14. The method for fabricating a semiconductor component according to claim 8 wherein the dielectric layer is deposited in one of a crystalline manner, in an oriented manner, and epitaxily in a high-temperature step.
 15. The method for fabricating a semiconductor component according to claim 8, wherein the semiconductor component comprises a trench capacitor with a construction of an electrode layer/insulator layer/electrode layer, the substrate forming a first electrode layer, the dielectric layer being the insulator layer and a second electrode layer being applied to the dielectric layer, and wherein first a trench is provided in the substrate by means of a first etching process, the trench walls are subjected to a second etching process, which creates a widened trench with modified trench walls with a predetermined crystal orientation; and the dielectric layer is grown on the modified trench walls with a predetermined crystal orientation.
 16. The method according to claims 8 wherein the semiconductor component is a trench capacitor, the dielectric being grown epitaxily in the trench.
 17. A method for fabricating a semiconductor trench capacitor component, comprising the steps of: providing a substrate comprising a first capacitor electrode; providing a dielectric layer on the substrate by first depositing a metal onto the substrate which is then oxidized in a thermal process so that the dielectric layer comprises a binary metal oxide; the layer being dielectric epitaxily grown in the trench; and filling the trench on top of the dielectric layer with polysilicon to form a second capacitor electrode. 